A Platform for VHDL Visualization
نویسندگان
چکیده
This paper presents a new platform for VHDL visualization to support undergraduates in learning this hardware description language. The presented platform, denoted as VISUAL-VHDL, enables students to enter their own VHDL code and control an animation process, which shows step-by-step how the different language constructs are treated to synthesize a complete digital circuit. Furthermore, VISUAL-VHDL enables the visualization of the Quine-McCluskey algorithm, which is embedded in our tools to optimize the circuit resulting from synthesizing the VHDL code.
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